Toolchain and Files

The workflow of a hardware compilation and hosting:

Explanation of files:

• source file (.aps): the source code of a SCAMP-5c program for both simulation and hardware.
• host template (.txt): this contains a template of the APRON Runtime UI for hosting the hardware.
• bit file: the ipu of SCAMP-5c is implemented using a FPGA and the bit file is the configuration for the FPGA.
• icw file: the compiled code of a SCAMP-5c program that can be run on the hardware.

The workflow of a simulation:

Source Code & Editor

APRON Runtime UI